Hwaling Technology Co., Ltd.


Parallel NAND Flash
  • Facebook
  • LINE
  • Twitter
  • LinkedIn

Product Name : 2G-Bit 3.3V NAND FLASH MEMORY

Item No. : H7A12G24B5CN


The H7A12G24B5CN (2G-bit) NAND Flash memory provides a storage solution for embedded systems with limited space, pins and power. It is ideal for code shadowing to RAM, solid state applications and storing media data such as,voice, video, text and photos. The device operates on a single 2.7V to 3.6V power supply with active current consumption as low as 25mA at 3V and 10uA for CMOS standby current.

The memory array totals 276,824,064 bytes, and organized into 2,048 erasable blocks of 135,168 bytes. Each block consists of 64 programmable pages of 2,112-bytes each. Each page consists of 2,048-bytes for the main data storage area and 64-bytes for the spare data area (The spare area is typically used for error management functions). The H7A12G24B5CN supports the standard NAND flash memory interface using the multiplexed 8-bit bus to transfer data, addresses, and command instructions.

The five control signals, CLE, ALE, #CE, #RE and #WE handle the bus interface protocol. Also, the device has two other signal pins, the #WP (Write Protect) and the RY/#BY (Ready/Busy) for monitoring the device status.
H7A12G24B5CN_Parallel_NAND Flash_2Gb (668 KB)
  • Basic Features
    – Density : 2Gbit (Single chip solution)
    – Vcc : 2.7V to 3.6V
    – Bus width : x8
    – Operating temperature
     Commercial: 0°C to 70°C
  • Single-Level Cell (SLC) technology.
  • Organization
    – Density: 2G-bit/256M-byte
    – Page size
     2,112 bytes (2048 + 64 bytes)
    – Block size
     64 pages (128K + 4K bytes)
  • Highest Performance
    – Read performance (Max.)
  • Random read: 25us
  • Sequential read cycle: 25ns
    – Write Erase performance
  • Page program time: 250us(typ.)
  • Block erase time: 2ms(typ.)
    – Endurance 100,000 Erase/Program Cycles
    – 10-years data retention
  • Command set
    – Standard NAND command set
    – Additional command support
  • Sequential / Random Cache Read
  • Cache Program
  • Copy Back
  • Two-plane operation
    – OTP feature
    – Block Lock feature
  • Lowest power consumption
    – Read: 25mA(typ.3V)
    – Program/Erase: 25mA(typ.3V)
    – CMOS standby: 10uA(typ.)
  • Space Efficient Packaging
    – 63-ball VFBGA