Axeme - Hwaling Technology Co., Ltd.

Hwaling Technology is based in Taipei, Taiwan. As the interaction of Communication, Electronic Consumer and Computing gadgets has became the main stream in consumer lives. Hwaling practices his specialty with long-term experience in this memory field to drive quality products and services to customers.

SPI NOR Flash

Axeme - Hwaling Technology Co., Ltd.’s mission is to be innovative through new designs and to produce the highest quality products at incredible value. SPI NOR Flash are very helpful to your business. With the help of SPI NOR Flash, everything becomes great.
Item No. Product Name Density Voltage Package File Download
H7A5DM26BACT SPI NOR Flash 128Mb 3V 8-pin SOIC 208-mil H7A5DM26BACT_SPI-NOR FLASH MEMORY (696 KB)
H7A5EM26B7CT SPI NOR Flash 256MB 3V 16-pin SOIC 300mil H7A5EM26B7CT_SPI-NOR FLASH MEMORY (755 KB)
H7A5FM26B7CX SPI NOR Flash 512MB 3V 16-pin SOIC 300mil H7A5FM26B7CX_SPI-NOR MCP FLASH MEMORY (797 KB)

H7A5DM26BACT

128M-BIT 3V SPI-NOR FLASH MEMORY

The H7A5DM26BACT (128M-bit) Serial Flash provides a storage solution for systems with limited space, pins and power. The product offers flexibility and performance well beyond ordinary Serial Flash devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing voice, text and data. The device operates on a single 2.7V to 3.6V power supply with current consumption as low as 4mA active and 1μA for power-down. All devices are offered in space-saving packages.

The H7A5DM26BACT array is organized into 65,536 programmable pages of 256-bytes each. Up to 256 bytes can be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of 128 (32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The H7A5DM26BACT has 4,096 erasable sectors and 256 erasable blocks respectively. The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage.

The H7A5DM26BACT support the standard Serial Peripheral Interface (SPI), Dual/Quad I/O SPI as well as 2-clocks instruction cycle Quad Peripheral Interface (QPI): Serial Clock, Chip Select, Serial I/O2 (/WP), and I/O3 (/HOLD). SPI clock frequencies of up to 1 Data I/O0 (DI), I/O1 (DO), 04MHz are supported allowing equivalent clock rates of 208MHz (104MHz x 2) for Dual I/O and 416MHz (104MHz x 4) for Quad I/O when using the Fast Read Dual/Quad I/O and QPI instructions. These transfer rates can outperform standard Asynchronous 8 and 16-bit Parallel Flash memories. The Continuous Read Mode allows for efficient memory access with as few as 8-clocks of instruction-overhead to read a 24-bit address, allowing true XIP (execute in place) operation.

A Hold pin, Write Protect pin and programmable write protection, with top or bottom array control, provide further control flexibility. Additionally, device supports JEDEC standard manufacturer and device ID, a 64-bit Unique Serial Number and three 256-bytes Security Registers.

H7A5EM26B7CT

256M-BIT 3V SPI-NOR FLASH MEMORY

The H7A5EM26B7CT (256M-bit) Serial Flash provides a storage solution for systems with limited space, pins and power. The product offers flexibility and performance well beyond ordinary Serial Flash devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing voice, text and data. The device operates on a single 2.7V to 3.6V power supply with current consumption as low as 1μA for power-down. All devices are offered in space-saving packages.

The H7A5EM26B7CT array is organized into 131,072 programmable pages of 256-bytes each. Up to 256 bytes can be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of 128 (32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The H7A5EM26B7CT has 8,192 erasable sectors and 512 erasable blocks respectively. The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage.

The H7A5EM26B7CT support the standard Serial Peripheral Interface (SPI), Dual/Quad I/O SPI as well as 2-clocks instruction cycle Quad Peripheral Interface (QPI): Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1 (DO), I/O2 (/WP), and I/O3 (/HOLD). SPI clock frequencies of up to 104MHz are supported allowing equivalent clock rates of 208MHz (104MHz x 2) for Dual I/O and 416MHz (104MHz x 4) for Quad I/O when using the Fast Read Dual/Quad I/O instructions. These transfer rates can outperform standard Asynchronous 8 and 16-bit Parallel Flash memories. The Continuous Read Mode allows for efficient memory access with as few as 8-clocks of instruction-overhead to read a 24-bit address, allowing true XIP (execute in place) operation.

A Hold pin, Write Protect pin and programmable write protection, with top or bottom array control, provide further control flexibility. Additionally, device supports JEDEC standard manufacturer and device ID, a 64-bit Unique Serial Number and three 256-bytes Security Registers.

H7A5FM26B7CX

512M-BIT 3V SPI-NOR MCP FLASH MEMORY

The H7A5FM26B7CX (2 X 256M-bit) Serial MCP Flash offers the highest memory density for the low pin-count package, as well as Concurrent Operations in Serial Flash memory for the first time.It is ideal for small form factor system designs, and applications that demand high Program/Erase data throughput.

The H7A5FM26B7CX introduces a new “Software Die Select (C2h)” instruction, and a factory assigned “Die ID#” for each stacked die. Each H7A5EM die can be accessed independently even though the interface is shared. The stack feature only allows a single die to be Active and have control of the SPI interface at any given time to avoid bus contention.

The H7A5FM26B7CX maintains all the SPI Flash features and functions, with the support for standard SPI (Serial Peripheral Interface), Dual I/O SPI, and Quad I/O SPI read operations through the shared SPI interface: Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1 (DO), I/O2, and I/O3.

Each H7A5EM memory array is organized into 131,072 programmable pages of 256-Byte each. Up to 256 bytes can be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of 128 (32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage.
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