Axeme - Hwaling Technology Co., Ltd.

Hwaling Technology is based in Taipei, Taiwan. As the interaction of Communication, Electronic Consumer and Computing gadgets has became the main stream in consumer lives. Hwaling practices his specialty with long-term experience in this memory field to drive quality products and services to customers.

Quality SDRAM Supplier in Taiwan

Axeme - Hwaling Technology Co., Ltd. is an acknowledged leader in the manufacture of SDRAM, with distribution across the globe. We guarantee the quality of our DRAM memory module, since we deal only with authorized and reliable synchronous dynamic RAM manufactures. We are a professional SDRAM supplier with worldwide assets that is dedicated to our customers' requests and end result satisfaction. Our focus is on our customer in which has given us a large and loyal customer base. 
Item No. Product Name Density Organization Voltage Package File Download
H2A116M1633B SDRAM 16Mb 1Mb x 16 3.3V TSOP2 50L H2A116M1633B_SDR_1Mx16(753 KB)
H2A164M1633B SDRAM 64Mb 4Mb x 16 3.3V TSOP2 54L H2A164M1633B_SDR_4Mx16(467 KB)
H2A164M3233N SDRAM 64Mb 2Mb x 32 3.3V TSOP2 86L H2A164M3233N_SDR_2Mx32 (445 KB)
H2A11281633B SDRAM 128Mb 8Mb x 16 3.3V TSOP2 54L H2A11281633B_SDR_8Mx16(TSOP) (465 KB)
H2A11281636B SDRAM 128Mb 8Mb x 16 3.3V FBGA-54 H2A11281636B_SDR_8Mx16 (576 KB)
H2A11283233B SDRAM 128Mb 4Mb x 32 3.3V TSOP2 86L H2A11283233B_SDR_4Mx32 (697 KB)
H2A12561633B SDRAM 256Mb 16Mb x 16 3.3V TSOP2 54L H2A12561633B _SDR_16Mx16(667 KB)

H2A116M1633B

16Mb (512Kx2Banks×16) Synchronous SDRAM

The H2A116M1633B is Synchronous Dynamic Random Access Memory (SDRAM) organized as 512K words x 2 banks by 16 bits. All inputs and outputs are synchronized with the positive edge of the clock.
The 16Mb SDRAM uses synchronized pipelined architecture to achieve high speed data transfer rates and is designed to operate at 3.3V low power memory system. It also provides auto refresh with power saving / down mode. All inputs and outputs voltage levels are compatible with LVTTL.
Available packages:TSOPII 50P 400mil.

H2A164M1633B

64Mb (1M×4Bank×16) Synchronous DRAM

The H2A164M1633B is Synchronous Dynamic Random Access Memory (SDRAM) organized as 1Mega words x 4 banks by 16 bits. All inputs and outputs are synchronized with the positive edge of the clock.
The 64Mb SDRAM uses synchronized pipelined architecture to achieve high speed data transfer rates and is designed to operate at 3.3V low power memory system. It also provides auto refresh with power saving / down mode. All inputs and outputs voltage levels are compatible with LVTTL.
Available packages: TSOPII 54P 400mil.
  • All Inputs are Sampled at the Rising Edge of the System Clock
  • Auto Refresh and Self Refresh
  • 4,096 Refresh Cycles / 64ms (15.625us)

H2A164M3233N

64Mb (512K×4Banks×32) Synchronous DRAM

The H2A164M3233N is Synchronous Dynamic Random Access Memory (SDRAM) organized as 512K words x 4 banks by 32 bits. All inputs and outputs are synchronized with the positive edge of the clock.
Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE command. Column addresses are automatically generated by the SDRAM internal counter in burst operation. Random column read is also possible by providing its address at each clock cycle. The multiple bank nature enables interleaving among internal banks to hide the precharging time.

H2A11281633B

128Mb (2M×4Bank×16) Synchronous DRAM

The H2A11281633B is Synchronous Dynamic Random Access Memory (SDRAM) organized as 2Mega words x 4 banks by 16 bits. All inputs and outputs are synchronized with the positive edge of the clock.
The 128Mb SDRAM uses synchronized pipelined architecture to achieve high speed data transfer rates and is designed to operate at 3.3V low power memory system. It also provides auto refresh with power saving / down mode. All inputs and outputs voltage levels are compatible with LVTTL.
Available packages: TSOPII 54P 400mil.
  • All Inputs are Sampled at the Rising Edge of the System Clock
  • Auto Refresh and Self Refresh
  • 4,096 Refresh Cycles / 64ms (15.625us)

H2A12561633B

256Mb (4Mx4Banks×16) Synchronous SDRAM

The H2A12561633B is Synchronous Dynamic Random Access Memory (SDRAM) organized as 4Meg words x 4 banks by 16 bits. All inputs and outputs are synchronized with the positive edge of the clock.
The 256Mb SDRAM uses synchronized pipelined architecture to achieve high speed data transfer rates and is designed to operate at 3.3V low power memory system. It also provides auto refresh with power saving / down mode. All inputs and outputs voltage levels are compatible with LVTTL.
Available packages: TSOPII 54P 400mil.

H2A11283233B

128Mb (1M×4Banks×32) Synchronous DRAM

The H2A11283233B is Synchronous Dynamic Random Access Memory (SDRAM) organized as 1Meg words x 4 banks by 32 bits. All inputs and outputs are synchronized with the positive edge of the clock.
Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE command. Column addresses are automatically generated by the SDRAM internal counter in burst operation. Random column read is also possible by providing its address at each clock cycle. The multiple bank nature enables interleaving among internal banks to hide the precharging time.

H2A11281636B

128Mb (2M×4Bank×16) Synchronous DRAM

The H2A11281636B is Synchronous Dynamic Random Access Memory (SDRAM) organized as 2Mega words x 4 banks by 16 bits. All inputs and outputs are synchronized with the positive edge of the clock.
The 128Mb SDRAM uses synchronized pipelined architecture to achieve high speed data transfer rates and is designed to operate at 3.3V low power memory system. It also provides auto refresh with power saving / down mode. All inputs and outputs voltage levels are compatible with LVTTL.
Packaged in TFBGA 54 Ball (8x8 mm^2).
  • All Inputs are Sampled at the Rising Edge of the System Clock
  • Auto Refresh and Self Refresh
  • 4,096 Refresh Cycles / 64ms (15.625us)
Axeme - Hwaling Technology Co., Ltd. specializes in the purchase and sale of SDRAM. We have a vast inventory of DRAM memory module to better your current process, increasing efficiency while reducing raw materials waste and cost. Since 1998, Axeme - Hwaling Technology Co., Ltd. has provided the synchronous dynamic RAM with innovative designs, reliable manufacturing, high-quality standards, competitive pricing and low life-cycle costs. We are a well-recognized name across the globe for our ability to supply our products to major OEM's.