Axeme - Hwaling Technology Co., Ltd.

Hwaling Technology is based in Taipei, Taiwan. As the interaction of Communication, Electronic Consumer and Computing gadgets has became the main stream in consumer lives. Hwaling practices his specialty with long-term experience in this memory field to drive quality products and services to customers.

1Gb (8Mx8Banksx16) DDR2 SDRAM, H2A301G1656C

Axeme - Hwaling Technology Co., Ltd.’s DDR2 SDRAM is currently one of the most advanced DDR2 SDRAM available on the world market and will provide the best product ratio between quality-price. We not only provide a positive contribution to a sustainable development but also preserve a clean earth for the next generation. Please call or email us if you have any questions concerning compact DDR2 SDRAM.

H2A301G1656C

1Gb (8Mx8Banksx16) DDR2 SDRAM

The H2A301G1656C is a high speed Double Date Rate 2 (DDR2) Synchronous DRAM fabricated with ultra high performance CMOS process containing 1G bits which organized as 8Mbits x 8 banks by 16 bits.
This synchronous device achieves high speed double-data-rate transfer rates of up to 1066 Mb/sec/pin (DDR2-1066) for general applications.
The chip is designed to comply with the following key DDR2 SDRAM features:
  1. posted CAS with additive latency
  2. write latency = read latency -1
  3. Off-Chip Driver (OCD) impedance adjustment and On Die Termination
  4. normal and weak strength data output driver

All of the control and address inputs are synchronized with a pair of externally supplied differential clocks.
Inputs are latched at the cross point of differential clocks (CK rising and /CK falling).
All I/Os are synchronized with a pair of bidirectional strobes (DQS and /DQS) in a source synchronous fashion.
The address bus is used to convey row, column and bank address information in a /RAS and /CAS multiplexing style.
The 1Gb DDR2 devices operate with a single power supply: 1.8V ± 0.1V VDD and VDDQ.
Available package: TFBGA-84Ball.
Features :

  • JEDEC Standard VDD/VDDQ = 1.8V±0.1V.
  • All inputs and outputs are compatible with SSTL_18 interface.
  • Fullydifferential clock inputs (CK, /CK) operation.
  • Eight Banks
  • Posted CAS
  • Bust length: 4 and 8.
  • Write Latency (WL) =Read Latency (RL) -1.
  • Read Latency (RL) = Programmable Additive Latency (AL) + CAS Latency (CL)
  • Bi-directional DifferentialData Strobe (DQS).
  • Data inputs on DQS centers when write.
  • Data outputs on DQS, /DQS edges when read.
  • On chip DLL align DQ, DQS and /DQS transition with CK transition.
  • DM mask write data-in at the both rising and falling edges of the data strobe.
  • Sequential & Interleaved Burst type available.
  • Off-Chip Driver (OCD) Impedance Adjustment
  • On Die Termination (ODT)
  • Auto Refresh and Self Refresh
  • 8,192 Refresh Cycles / 64ms
  • RoHS Compliance
  • Partial Array Self-Refresh (PASR)
  • High Temperature Self-Refresh rate enable

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With our well equipped low-cost operation in Taiwan, Axeme - Hwaling Technology Co., Ltd. as a group is well positioned in the competitive market of DDR2 SDRAM design and manufacturing. Axeme - Hwaling Technology Co., Ltd. has earned an impressive reputation for providing outstanding service and developing efficient, comprehensive global supply chain solutions. If you want to make a suggestion or place a feedback about our staff, service or website, please phone or email to us, we will reply you as soon as possible.