256G-Bit 3.3V NAND FLASH MEMORY, H7A2EG21C1CX
H7A2EG21C1CX
256G-Bit 3.3V NAND FLASH MEMORY
The H7A2EG21C1CX (256G-bit) NAND Flash device additionally includes a synchronous data interface for high-performance I/O operations. When the synchronous interface is active, WE# becomes CLK and RE# becomes W/R#. Data transfers include a bidirectional data strobe (DQS).
This hardware interface creates a low pin-count device with a standard pinout that remains the same from one density to another, enabling future upgrades to higher densities with no board redesign.
A target is the unit of memory accessed by a chip enable signal. A target contains one or more NAND Flash die. A NAND Flash die is the minimum unit that can independently execute commands and report status. A NAND Flash die, in the ONFI specification, is referred to as a logical unit (LUN).
– Page size: 8936 bytes (8192 + 744 bytes)
– Block size: 256 pages (2048K + 186K bytes)
– Plane size: 2 planes x 1064 blocks per plane
– Device size: 256Gib =17024 blocks
– Up to synchronous timing mode 43
– Clock rate: 10ns (DDR)
– Read/write throughput per pin: 166MT/s
– Up to asynchronous timing mode 5
– tRC/tWC: 20ns (MIN)
– Read/write throughout per pin: 50MT/s
– Read Page: 130μs (MAX)
– Program Page: 3200μs (MAX)
– Erase Block: 15ms (MAX)
– VCC: 2.7–3.6V
– VCCQ: 2.7V-3.6V
– Program cache
– Read cache sequential
– Read cache random
– One-time programmable (OTP) mode
– Multi-plane commands
– Multi-LUN operations
– Copyback
– Commercial: +10°C to +70°C